This invention relates to an amplifier arrangement comprising:
a first transistor and a second transistor which are of the same conductivity type and which each comprise a control terminal for receiving an input signal, a first main terminal, and a second main terminal, the first main terminals being coupled to a common terminal, and
means for applying a bias current which depends on the input signal to the common terminal, which means comprise a third transistor and a fourth transistor, which each comprise a control terminal and a first and a second main terminal, the currents in the third and fourth transistors being indicative of the currents in the first transistor and in the second transistor, respectively.
In the present description and the appended claims, the first main terminal and the second main terminal are the source electrode and the drain electrode, respectively, in the case of unipolar transistors and the emitter and the collector, respectively, in the case of bipolar transistors.
Such a circuit arrangement is suitable for general use in integrated circuits and in particular in switched-capacitor filter circuits.
In integrated circuits it is important to minimize the power dissipation of the amplifier circuitry used therein. This may be accomplished by selecting a small bias current for the amplifier arrangement. However, a small bias current limits the slew rate of the amplifier arrangement. The slew rate is to be understood to mean the maximum rate of change of the output signal in the case of capacitive loading of the amplifier arrangement. This slew rate is proportional to the bias current of the amplifier arrangement. In order to obtain a low power dissipation in combination with a high slew rate, it is known to increase the bias current of the amplifier arrangement as the input signal increases. Such a solution is described inter alia in the article "Adaptive Biasing CMOS Amplifiers", IEEE Journal of Solid-State Circuits, Vol. SC-17, No. 3, June 1982, pp. 522-528. In this article it is proposed to add a signal-dependent current, which is proportional to the absolute value of the difference between the currents in the amplifier transistors, to a small constant bias current. In that circuit arrangement this is achieved by providing positive feedback of the bias current, the amount of feedback depending on the differential output current of the amplifier circuit. However, the bias current is not defined accurately because the positive feedback causes this current to increase to an extent which is higher than necessary. This also leads to an unnecessarily high dissipation. Therefore, the invention aims at providing an amplifier arrangement with a signal-dependent bias current and a very low power dissipation.